Noise coupling analysis of through-silicon via-based three-dimensional integrated circuits using carbon nanotube interconnects and Teflon dielectric for high-frequency applications
Conventional two-dimensional integrated circuits are increasingly limited by interconnect delays, power density, and scaling constraints predicted by Moore’s law. Three-dimensional (3D) integrated circuits (ICs), enabled by through-silicon via (TSV) technology, overcome these limitations by vertically stacking dies, thereby reducing interconnect lengths, increasing bandwidth, enhancing functionality, and allowing higher integration density. However, noise coupling in TSV-based 3D ICs significantly impacts signal integrity, especially at high operating frequencies. This study proposes replacing the traditional dielectric silicon dioxide (SiO2) with Teflon due to its lower dielectric constant and higher thermal resistivity. It provides a comprehensive comparative analysis of copper (Cu), carbon nanotube (CNT), and conventional semiconductor core materials using both single-liner and stacked-liner configurations with SiO2 and Teflon dielectrics at 10 GHz and 1 THz. Noise coupling is assessed in terms of electric potential and expressed as attenuation in dB. Results show that CNT interconnects consistently display lower noise coupling than metallic and semiconductor cores. At 10 GHz and 4 μm arc length, Teflon–CNT achieves 10.75 dB compared to 5.03 dB for SiO–Cu. At 1 THz, attenuation decreases to 13.56 dB, representing an 8.53 dB reduction relative to Cu. Although SiO2 remains an industry-standard dielectric, the Teflon-based stacked configuration offers superior high-frequency isolation. Consequently, the CNT–Teflon structure emerges as a promising solution for next-generation high-performance 3D IC systems beyond conventional scaling limits.
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